BREAKING
Huawei unveils 'Tau Scaling Law' chip path
How LogicFolding works
1
Shorten signal paths
↓
2
Fold on-chip wiring
↓
3
System-level efficiency
0
Chips made
0
yr
Time span
0
nm
2031 target
0
TFLOPS
FP16/BF16
0
GB
HBM2e memory
0
W
TDP
Domestic push vs CUDA gap
Strengths
●
Stable domestic supply
●
Cost advantage at scale
●
Baidu, ByteDance interest
Challenges
●
Immature CANN toolchain
●
Power and heat gaps
●
No verified 1.4nm proof
A test of US export-control limits
AI NEWS BLITZ
Huawei has unveiled a new chip principle aiming for 1.4-nanometer-class density by 2031.